{"id":26355,"date":"2025-06-04T19:45:03","date_gmt":"2025-06-04T19:45:03","guid":{"rendered":"https:\/\/wattsemi.com\/?p=26355"},"modified":"2025-06-04T19:53:55","modified_gmt":"2025-06-04T19:53:55","slug":"accounting-for-on-chip-variations-during-sta","status":"publish","type":"post","link":"https:\/\/wattsemi.com\/?p=26355","title":{"rendered":"Accounting for On Chip Variations during STA"},"content":{"rendered":"\n<h3 class=\"wp-block-heading has-light-green-cyan-background-color has-background\">Let&#8217;s begin by first answering what is OCV or On-Chip-Variation during Static Timing Analysis (STA) in an ASIC Physical Design cycle? <\/h3>\n\n\n\n<p><strong>On-Chip Variation (OCV)<\/strong>\u00a0in Static Timing Analysis (STA) accounts for the variability of process parameters, voltages, and temperatures (PVT) within a single chip. Unlike global variations, which assume uniform PVT conditions across the entire chip, OCV recognizes that different parts of a chip can experience variations in these parameters simultaneously. OCV is considered for a single PVT.<\/p>\n\n\n\n<p><strong>On-Chip Variation (OCV)<\/strong>&nbsp;refers to manufacturing and environmental variations across a chip that cause differences in delay and slew rates of identical cells\/nets. These variations arise from:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Process<\/strong>: Transistor threshold voltage (Vth\u200b), oxide thickness variations.<\/li>\n\n\n\n<li><strong>Voltage (IR Drop)<\/strong>: Local power supply fluctuations.<\/li>\n\n\n\n<li><strong>Temperature (Thermal Gradients)<\/strong>: Hotspots vs. cooler regions.<\/li>\n<\/ul>\n\n\n\n<div style=\"height:15px\" aria-hidden=\"true\" class=\"wp-block-spacer\"><\/div>\n\n\n\n<p><strong>CLOCK Uncertainty<\/strong>: CLOCK uncertainty includes components of skew variance, jitter and OCV variations.<\/p>\n\n\n\n<p><strong>Jitter<\/strong> : Is termed as the deviation of clock edge from its ideal location.<\/p>\n\n\n\n<div style=\"height:23px\" aria-hidden=\"true\" class=\"wp-block-spacer\"><\/div>\n\n\n\n<figure class=\"wp-block-image size-full is-resized\"><img fetchpriority=\"high\" decoding=\"async\" width=\"800\" height=\"450\" src=\"https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-8.png\" alt=\"\" class=\"wp-image-26360\" style=\"width:766px;height:auto\" srcset=\"https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-8.png 800w, https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-8-300x169.png 300w, https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-8-768x432.png 768w\" sizes=\"(max-width: 800px) 100vw, 800px\" \/><\/figure>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity is-style-dots\"\/>\n\n\n\n<h3 class=\"wp-block-heading has-light-green-cyan-background-color has-background\">Now, we will try to understand how to correctly account for OCV during STA.<\/h3>\n\n\n\n<p>To account for\u00a0<strong>On-Chip Variation (OCV)<\/strong>\u00a0during\u00a0<strong>Static Timing Analysis (STA)<\/strong>, specific techniques and methodologies are employed to model and analyze the timing impacts of variability across different parts of the chip. <\/p>\n\n\n\n<p>OCV is modeled in STA to ensure timing robustness by accounting for worst-case delays. Key concepts on how OCV is handled during STA:<br><\/p>\n\n\n\n<h3 class=\"wp-block-heading\">1.&nbsp;<strong>Apply Derating Factors<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>OCV Derates<\/strong>\u00a0are scaling factors applied to delays and constraints to model timing variability between different parts of the chip.<\/li>\n\n\n\n<li>Separate derating factors are applied for\u00a0<strong>setup analysis<\/strong>\u00a0(slower paths) and\u00a0<strong>hold analysis<\/strong>\u00a0(faster paths) to model worst-case scenarios:\n<ul class=\"wp-block-list\">\n<li><strong>Setup Analysis:<\/strong>\u00a0Increase the delays on data paths and decrease clock path delays to mimic worst-case scenarios for setup violations.<\/li>\n\n\n\n<li><strong>Hold Analysis:<\/strong>\u00a0Decrease the delays on data paths and increase clock path delays to mimic worst-case scenarios for hold violations.<\/li>\n<\/ul>\n<\/li>\n\n\n\n<li>These derating factors can be specified as percentages (e.g., \u00b110%) and are provided in the timing library or manually defined.<\/li>\n<\/ul>\n\n\n\n<div style=\"height:42px\" aria-hidden=\"true\" class=\"wp-block-spacer\"><\/div>\n\n\n\n<figure class=\"wp-block-image size-large\"><img decoding=\"async\" width=\"1024\" height=\"194\" src=\"https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-7-1024x194.png\" alt=\"\" class=\"wp-image-26358\" srcset=\"https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-7-1024x194.png 1024w, https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-7-300x57.png 300w, https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-7-768x146.png 768w, https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-7-1536x291.png 1536w, https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-7.png 1950w\" sizes=\"(max-width: 1024px) 100vw, 1024px\" \/><\/figure>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity is-style-dots\"\/>\n\n\n\n<h3 class=\"wp-block-heading\">2.&nbsp;<strong>Perform Multi-Corner, Multi-Mode (MCMM) Analysis<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>OCV is analyzed across various\u00a0<strong>process corners<\/strong>\u00a0(e.g., slow-slow, fast-fast, typical-typical),\u00a0<strong>voltage levels<\/strong>, and\u00a0<strong>temperatures<\/strong>\u00a0to ensure robustness across all conditions.<\/li>\n\n\n\n<li>Each mode and corner is analyzed with OCV applied.<\/li>\n<\/ul>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity is-style-dots\"\/>\n\n\n\n<h3 class=\"wp-block-heading\">3.&nbsp;<strong>Advanced OCV Models<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>AOCV (Advanced OCV):<\/strong>\n<ul class=\"wp-block-list\">\n<li>Models OCV more realistically by considering the\u00a0<strong>path depth<\/strong>\u00a0and\u00a0<strong>path location<\/strong>\u00a0in the design.<\/li>\n\n\n\n<li>Long paths with more stages are less impacted by OCV due to averaging effects, while short paths are more affected.<\/li>\n\n\n\n<li>AOCV uses lookup tables to apply stage-aware derates.<\/li>\n<\/ul>\n<\/li>\n\n\n\n<li><strong>POCV (Parametric OCV):<\/strong>\n<ul class=\"wp-block-list\">\n<li>Extends AOCV by using statistical models to compute delays based on variations and probabilities.<\/li>\n\n\n\n<li>Provides a more accurate and less pessimistic timing analysis compared to static OCV or AOCV.<\/li>\n<\/ul>\n<\/li>\n<\/ul>\n\n\n\n<p>&nbsp;<strong>POCV (Parametric On-Chip Variation)<\/strong>&nbsp;settings are used in&nbsp;<strong>Static Timing Analysis (STA)<\/strong>&nbsp;to model timing variations more accurately by incorporating statistical variation into path delays, as opposed to using fixed derates like in traditional OCV or AOCV approaches.&nbsp;<\/p>\n\n\n\n<p>&nbsp;POCV provides&nbsp;more realistic and less pessimistic&nbsp;results by modeling the probability distribution of delay variation.<\/p>\n\n\n\n<p class=\"has-vivid-cyan-blue-color has-text-color has-link-color wp-elements-ca650dff9d79c02b0918d0f3959514d2\"><strong>\u00a0set_pocv_stddev\u00a00.05\u00a0\u00a0; # 5% standard deviation ns for each segment of a timing path.<\/strong><\/p>\n\n\n\n<div style=\"height:58px\" aria-hidden=\"true\" class=\"wp-block-spacer\"><\/div>\n\n\n\n<figure class=\"wp-block-image size-large\"><img decoding=\"async\" width=\"1024\" height=\"626\" src=\"https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-10-1024x626.png\" alt=\"\" class=\"wp-image-26362\" srcset=\"https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-10-1024x626.png 1024w, https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-10-300x183.png 300w, https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-10-768x469.png 768w, https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-10.png 1506w\" sizes=\"(max-width: 1024px) 100vw, 1024px\" \/><\/figure>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity is-style-dots\"\/>\n\n\n\n<h3 class=\"wp-block-heading\">4.&nbsp;<strong>Setup and Hold Timing Checks<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>STA tools (e.g., Synopsys PrimeTime, Cadence Tempus) apply OCV-aware derates while performing setup and hold timing checks.<\/li>\n\n\n\n<li>Timing reports explicitly include OCV-adjusted delays for clock and data paths.<\/li>\n<\/ul>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity is-style-dots\"\/>\n\n\n\n<h3 class=\"wp-block-heading\">5.&nbsp;<strong>Group-Specific OCV (GOCV)<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>For regions of the chip that share similar characteristics (e.g., same clock domain or physical proximity), specific OCV factors can be applied, reducing over-pessimism.<\/li>\n<\/ul>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity is-style-dots\"\/>\n\n\n\n<h3 class=\"wp-block-heading\">6.&nbsp;<strong>Margin Adjustments<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Incorporate\u00a0<strong>additional margins<\/strong>\u00a0during clock tree synthesis (CTS) or placement\/routing to account for variability.<\/li>\n\n\n\n<li>Use margins judiciously to avoid excessive pessimism that impacts design performance.<\/li>\n<\/ul>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity is-style-dots\"\/>\n\n\n\n<h3 class=\"wp-block-heading\">7.&nbsp;<strong>Tool-Specific Features<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Modern STA tools support OCV methodologies natively:\n<ul class=\"wp-block-list\">\n<li>Synopsys PrimeTime: Supports OCV, AOCV, and POCV.<\/li>\n\n\n\n<li>Cadence Tempus: Provides OCV-aware timing analysis and optimization.<\/li>\n\n\n\n<li>Mentor Graphics (Siemens) Timequest: Incorporates OCV analysis for FPGAs and ASICs.<\/li>\n<\/ul>\n<\/li>\n<\/ul>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity is-style-dots\"\/>\n\n\n\n<h2 class=\"wp-block-heading has-pale-cyan-blue-background-color has-background\"><strong>OCV vs. Other Variation Models<\/strong><\/h2>\n\n\n\n<div style=\"height:23px\" aria-hidden=\"true\" class=\"wp-block-spacer\"><\/div>\n\n\n\n<figure class=\"wp-block-table\"><table class=\"has-fixed-layout\"><thead><tr><th><strong>Model<\/strong><\/th><th><strong>Granularity<\/strong><\/th><th><strong>Pessimism<\/strong><\/th><th><strong>Use Case<\/strong><\/th><\/tr><\/thead><tbody><tr><td><strong>Path-Based OCV<\/strong><\/td><td>Global derating<\/td><td>High<\/td><td>Early design<\/td><\/tr><tr><td><strong>AOCV<\/strong><\/td><td>Path depth\/location<\/td><td>Medium<\/td><td>Mid-stage signoff<\/td><\/tr><tr><td><strong>POCV<\/strong><\/td><td>Statistical (Gaussian)<\/td><td>Low<\/td><td>Advanced nodes (&lt;7nm)<\/td><\/tr><tr><td><strong>LOCV<\/strong><\/td><td>Physical proximity<\/td><td>Medium-Low<\/td><td>Block-level STA<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity is-style-dots\"\/>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"342\" src=\"https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-9-1024x342.png\" alt=\"\" class=\"wp-image-26361\" srcset=\"https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-9-1024x342.png 1024w, https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-9-300x100.png 300w, https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-9-768x256.png 768w, https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-9.png 1219w\" sizes=\"(max-width: 1024px) 100vw, 1024px\" \/><\/figure>\n\n\n\n<p class=\"has-vivid-cyan-blue-color has-text-color has-link-color wp-elements-05632029db11419b895fe2527d27a9af\"><\/p>\n\n\n\n<div style=\"height:66px\" aria-hidden=\"true\" class=\"wp-block-spacer\"><\/div>\n\n\n\n<p class=\"has-vivid-cyan-blue-color has-text-color has-link-color wp-elements-0fdcaa4c5d48c651a74509a69fecab06\"><strong>Q:\u00a0<em>&#8220;How does OCV affect hold timing, and how would you fix it?&#8221;<\/em><br><\/strong><\/p>\n\n\n\n<blockquote class=\"wp-block-quote is-layout-flow wp-block-quote-is-layout-flow\">\n<p>&#8220;OCV increases hold margins by derating launch paths early (faster) and capture paths late (slower). Fixes include:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Buffer insertion<\/strong>\u00a0on short paths.<\/li>\n\n\n\n<li><strong>LOCV-aware CTS<\/strong>\u00a0to reduce skew variation.<\/li>\n\n\n\n<li><strong>AOCV\/POCV<\/strong>\u00a0to reduce pessimism.&#8221;<br><br><\/li>\n<\/ul>\n<\/blockquote>\n\n\n\n<p class=\"has-vivid-cyan-blue-color has-text-color has-link-color wp-elements-78d94f51c56efc66f5cd112721f208db\"><strong>Q:\u00a0<em>&#8220;Why is AOCV preferred over path-based OCV?&#8221;<\/em><\/strong><\/p>\n\n\n\n<blockquote class=\"wp-block-quote is-layout-flow wp-block-quote-is-layout-flow\">\n<p><em>&#8220;AOCV reduces pessimism by derating based on path depth and location. For example, a long path\u2019s cells statistically average out variations, so derating decreases with depth, unlike fixed path-based OCV.&#8221;<\/em><\/p>\n\n\n\n<div style=\"height:48px\" aria-hidden=\"true\" class=\"wp-block-spacer\"><\/div>\n<\/blockquote>\n\n\n\n<div class=\"wp-block-cover\" style=\"min-height:430px;aspect-ratio:unset;\"><img loading=\"lazy\" decoding=\"async\" width=\"640\" height=\"480\" class=\"wp-block-cover__image-background wp-image-26359\" alt=\"\" src=\"https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-4.jpeg\" data-object-fit=\"cover\" srcset=\"https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-4.jpeg 640w, https:\/\/wattsemi.com\/wp-content\/uploads\/2025\/06\/image-4-300x225.jpeg 300w\" sizes=\"(max-width: 640px) 100vw, 640px\" \/><span aria-hidden=\"true\" class=\"wp-block-cover__background has-background-dim\" style=\"background-color:#263e57\"><\/span><div class=\"wp-block-cover__inner-container is-layout-flow wp-block-cover-is-layout-flow\">\n<div class=\"wp-block-buttons alignwide is-content-justification-left is-layout-flex wp-container-core-buttons-is-layout-6a42c07d wp-block-buttons-is-layout-flex\">\n<div class=\"wp-block-button has-custom-width wp-block-button__width-25\"><a class=\"wp-block-button__link has-vivid-cyan-blue-background-color has-background wp-element-button\"><strong>WATT SEMI<\/strong><\/a><\/div>\n<\/div>\n<\/div><\/div>\n\n\n\n<p><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Let&#8217;s begin by first answering what is OCV or On-Chip-Variation during Static Timing Analysis (STA) in an ASIC Physical Design cycle? On-Chip Variation (OCV)\u00a0in Static Timing Analysis (STA) accounts for the variability of process parameters, voltages, and temperatures (PVT) within a single chip. Unlike global variations, which assume uniform PVT conditions across the entire chip, [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":26359,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"postBodyCss":"","postBodyMargin":[],"postBodyPadding":[],"postBodyBackground":{"backgroundType":"classic","gradient":""},"footnotes":""},"categories":[84,83,40],"tags":[95,97,96,98],"class_list":["post-26355","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-pdn","category-rtl-to-gds2","category-technology","tag-aocv","tag-ocv","tag-pocv","tag-sta"],"_links":{"self":[{"href":"https:\/\/wattsemi.com\/index.php?rest_route=\/wp\/v2\/posts\/26355","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/wattsemi.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/wattsemi.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/wattsemi.com\/index.php?rest_route=\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/wattsemi.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=26355"}],"version-history":[{"count":8,"href":"https:\/\/wattsemi.com\/index.php?rest_route=\/wp\/v2\/posts\/26355\/revisions"}],"predecessor-version":[{"id":26370,"href":"https:\/\/wattsemi.com\/index.php?rest_route=\/wp\/v2\/posts\/26355\/revisions\/26370"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/wattsemi.com\/index.php?rest_route=\/wp\/v2\/media\/26359"}],"wp:attachment":[{"href":"https:\/\/wattsemi.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=26355"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/wattsemi.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=26355"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/wattsemi.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=26355"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}