{"id":26237,"date":"2025-05-18T23:34:05","date_gmt":"2025-05-18T23:34:05","guid":{"rendered":"https:\/\/wattsemi.com\/?p=26237"},"modified":"2025-05-18T23:34:05","modified_gmt":"2025-05-18T23:34:05","slug":"low-power-design-upf-constructs","status":"publish","type":"post","link":"https:\/\/wattsemi.com\/?p=26237","title":{"rendered":"Low Power Design: UPF constructs"},"content":{"rendered":"\n

UPF (Unified Power Format) Construct Example for ASIC Low-Power Design<\/strong><\/h3>\n\n\n\n

UPF is used to define power domains, power states, isolation, retention, and level shifting<\/strong> in a design. Below is a practical example with explanations for each key construct.<\/p>\n\n\n\n

\"A<\/span>
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\u00a0UPF Information Model<\/strong><\/strong><\/p>\n<\/div><\/div>\n\n\n\n

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1. Basic UPF Example: Power Domain Definition<\/strong><\/h2>\n\n\n\n
# Load UPF library\nload_upf stdcell.upf\n\n# Define power domains\ncreate_power_domain PD_TOP \\\n  -include_scope \\\n  -elements {.}  # Top-level domain\n\ncreate_power_domain PD_CPU \\\n  -elements {u_cpu*} \\  # All CPU hierarchy\n  -supply {primary_rail}  # Main power supply\n\ncreate_power_domain PD_MEM \\\n  -elements {u_ram*} \\  # All memory instances\n  -supply {mem_vdd}     # Separate memory supply<\/code><\/pre>\n\n\n\n
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2. Power Supply Network<\/strong><\/h2>\n\n\n\n
# Define power nets and switches\ncreate_supply_net VDD -domain PD_TOP\ncreate_supply_net VSS -domain PD_TOP  # Ground\n\ncreate_supply_net MEM_VDD -domain PD_MEM\ncreate_supply_port VDD_PAD -domain PD_TOP\n\n# Connect supplies\nconnect_supply_net VDD -ports VDD_PAD\nconnect_supply_net MEM_VDD -domain PD_MEM -supply {VDD}  # Derived from VDD<\/code><\/pre>\n\n\n\n
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3. Power States & Transitions<\/strong><\/h2>\n\n\n\n
# Define power states\nadd_power_state PD_CPU \\\n  -state {ON} \\\n  -supply {primary_rail -voltage 0.9}  # Nominal voltage\n\nadd_power_state PD_CPU \\\n  -state {OFF} \\\n  -supply {primary_rail -voltage 0.0}  # Power-gated\n\nadd_power_state PD_MEM \\\n  -state {RETENTION} \\\n  -supply {mem_vdd -voltage 0.3}  # Low-power retention mode<\/code><\/pre>\n\n\n\n
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4. Isolation & Retention Strategies<\/strong><\/h2>\n\n\n\n
(A) Isolation Cells (Prevent Unknowns During Power-Down)<\/strong><\/h3>\n\n\n\n
set_isolation iso_cpu \\\n  -domain PD_CPU \\\n  -isolation_power_net VDD \\\n  -isolation_ground_net VSS \\\n  -clamp_value 0 \\  # Tie outputs to 0 when OFF\n  -applies_to outputs\n\nset_isolation_control iso_cpu \\\n  -domain PD_CPU \\\n  -isolation_signal power_enable \\  # Control signal\n  -location parent  # Isolation cell placement<\/code><\/pre>\n\n\n\n
(B) Retention Registers (Save State During Power-Down)<\/strong><\/h3>\n\n\n\n
set_retention ret_cpu \\\n  -domain PD_CPU \\\n  -retention_power_net VDD \\\n  -retention_ground_net VSS \\\n  -save_signal save_enable \\  # Save state signal\n  -restore_signal restore_enable  # Restore signal<\/code><\/pre>\n\n\n\n
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5. Level Shifters (Voltage Crossing)<\/strong><\/h2>\n\n\n\n
set_level_shifter ls_mem \\\n  -domain PD_MEM \\\n  -applies_to inputs \\  # Signals entering PD_MEM\n  -location self \\      # Place LS inside PD_MEM\n  -rule low_to_high \\   # 0.9V \u2192 1.2V\n  -threshold 0.6        # Voltage threshold<\/code><\/pre>\n\n\n\n
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6. Power Switches (For Power Gating)<\/strong><\/h2>\n\n\n\n
create_power_switch psw_cpu \\\n  -domain PD_CPU \\\n  -input_supply_port {in VDD} \\\n  -output_supply_port {out primary_rail} \\\n  -control_port {ctrl power_enable} \\\n  -on_state {ON ctrl {1}} \\\n  -off_state {OFF ctrl {0}}<\/code><\/pre>\n\n\n\n
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7. UPF Constraints for Synthesis\/P&R<\/strong><\/h2>\n\n\n\n
# Synopsys DC\/ICC2 commands to apply UPF\nload_upf design.upf\ncommit_upf  # Validate and apply UPF<\/code><\/pre>\n\n\n\n
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Key UPF Constructs Summary<\/strong><\/h2>\n\n\n\n
Construct<\/strong><\/th>Purpose<\/strong><\/th>Example<\/strong><\/th><\/tr><\/thead>
create_power_domain<\/code><\/td>Define voltage regions.<\/td>-elements {u_cpu*}<\/code><\/td><\/tr>
create_supply_net<\/code><\/td>Declare power nets.<\/td>-domain PD_TOP<\/code><\/td><\/tr>
set_isolation<\/code><\/td>Prevent X-propagation.<\/td>-clamp_value 0<\/code><\/td><\/tr>
set_retention<\/code><\/td>Save register state during power-off.<\/td>-save_signal save_enable<\/code><\/td><\/tr>
set_level_shifter<\/code><\/td>Handle voltage crossings.<\/td>-rule low_to_high<\/code><\/td><\/tr>
create_power_switch<\/code><\/td>Control power gating.<\/td>-on_state {ON ctrl {1}}<\/code><\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n
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Debugging UPF Issues<\/strong><\/h2>\n\n\n\n
    \n
  1. Check Power Domain Mapping<\/strong><\/li>\n<\/ol>\n\n\n\n
       report_power_domain -verbose<\/code><\/pre>\n\n\n\n
      \n
    1. Verify Isolation\/Rentention<\/strong><\/li>\n<\/ol>\n\n\n\n
         report_isolation -all\n   report_retention -all<\/code><\/pre>\n\n\n\n
        \n
      1. Validate Supply Connections<\/strong><\/li>\n<\/ol>\n\n\n\n
           report_supply_network<\/code><\/pre>\n\n\n\n
        \n\n\n\n
        Conclusion<\/strong><\/h3>\n\n\n\n
          \n
        • UPF ensures consistent low-power implementation<\/strong> across RTL-to-GDSII.<\/li>\n\n\n\n
        • Key steps<\/strong>: Power domains \u2192 Supplies \u2192 Isolation \u2192 Retention \u2192 Level shifters.<\/li>\n\n\n\n
        • Tool support<\/strong>: Synopsys (DC, ICC2), Cadence (Genus, Innovus), Siemens (Catapult).<\/li>\n<\/ul>\n\n\n\n
          \"Schematic<\/span>
          \n
          Power switch control tied off<\/strong><\/p>\n<\/div><\/div>\n","protected":false},"excerpt":{"rendered":"
          UPF (Unified Power Format) Construct Example for ASIC Low-Power Design UPF is used to define power domains, power states, isolation, retention, and level shifting in a design. Below is a practical example with explanations for each key construct. 1. Basic UPF Example: Power Domain Definition 2. Power Supply Network 3. Power States & Transitions 4. […]<\/p>\n","protected":false},"author":2,"featured_media":26238,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"postBodyCss":"","postBodyMargin":[],"postBodyPadding":[],"postBodyBackground":{"backgroundType":"classic","gradient":""},"footnotes":""},"categories":[40],"tags":[47,70],"class_list":["post-26237","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-technology","tag-low-power","tag-upf"],"_links":{"self":[{"href":"https:\/\/wattsemi.com\/index.php?rest_route=\/wp\/v2\/posts\/26237","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/wattsemi.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/wattsemi.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/wattsemi.com\/index.php?rest_route=\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/wattsemi.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=26237"}],"version-history":[{"count":1,"href":"https:\/\/wattsemi.com\/index.php?rest_route=\/wp\/v2\/posts\/26237\/revisions"}],"predecessor-version":[{"id":26240,"href":"https:\/\/wattsemi.com\/index.php?rest_route=\/wp\/v2\/posts\/26237\/revisions\/26240"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/wattsemi.com\/index.php?rest_route=\/wp\/v2\/media\/26238"}],"wp:attachment":[{"href":"https:\/\/wattsemi.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=26237"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/wattsemi.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=26237"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/wattsemi.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=26237"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}